Videos

Videos

Shaping the Future of Autonomous Driving

DVCon EU’2020 Tutorial: Meet ISO26262 FuSa Targets Through Static & Dynamic Fault Analysis

Meeting today’s Functional Safety Targets is posing new challenges for design teams working on automotive and other safety-critical chips at all, ASIL-A to -D, risk levels.

Even the parts of the design with the lowest ASIL A and B safety goals need some level of analysis, such as sizing different failure modes and making sure the implemented safety mechanisms at least has reasonable coverage potential.

Presented at: DVCon Europe 2020, Online Tutorial, October 27, 2020
By: Sesha Sai Kumar C.V., Optima’s Director of Application Engineering

Ansys-Optima webinar: Functional Safety for Semiconductors in Critical Autonomous driving systems

In this webinar, Optima, and Ansys showcase their collaboration around the combined solution for Functional Safety using the Optima Safety Platform and Ansys’ Medini Analyze. This solution provides the best of two words, Ansys’s best-in-class Functional Safety management platform with Optima’s best solutions for ASIL-A and ASIL-B fault-sizing solutions and ASIL-C and Ad ASIL-D fault simulations solutions for both Permanent-faults (Hard Errors) and Transient-Errors (Soft-Errors).

Presented at: Online Webinar, 13 May 2020
By: Nael Qudsi, former Optima Director Engineering, & Dr. Eckhardt Holz, Ansys Manager Safety Expert Team.

DVCon Europe 2019 – Panel: Automotive Specific, Next-Generation Verification Technologies

Panel: Applying the New Breed of Automotive Specific, Next-Generation Verification Technologies Moderator: Paul Dempsey – Tech Design Forum

Presented at: DVCon Europe 2019, 30 October 2021

Panelists:

* Jamil Mazzawi – Optima Design Automation; * Bill Bunton – Intel Corp.; * Dr. Ashish Darbari – Axiomise Ltd.; * Dave Kelf – Breker Verification Systems, Inc.; * Ralf Gorgen – NXP Semiconductor

ISO-26262 and Avoiding Hard and Soft Errors in Automotive IC

The safety-critical semiconductor products used in the Automotive Industry have to be safe from damages caused by random HW faults, both permanent and transitory, meeting the ISO-26262 standard. Here we review the main Design for Safety mechanisms that can be used to ensure design safety, discuss their relative merits, and focus on the validation (e.g., fault simulation) required to ensure the selected mechanisms have been used correctly.

Presented at: ChipEx 2017, Tel Aviv
By: Amir Rahat, former Optima VP of R&D

Optima Tools Presentation and Demo

In October 2017, Optima hosted the ISO-26262 SOTIF standard community meeting (ISO-26262 PT Meeting ISO PAS 21448) at its headquarters in Nazareth. This video includes a demo and presentation about Optima’s tools and solutions.

Presented at: ISO-26262 SOTIF meeting, Nazareth 2017
By the Optima team: Amir Rahat, Ayman Mouallem, and Deeb Kattoura

Design Reliability 2.0: Safety is Everything

The world of HW & SW engineering is continually reinventing itself. This time it is about safety. As computers move out of the virtual world and begin participating in the real world (driving cars, controlling plants, controlling cities and traffic jams, etc.), the demands for safety grow dramatically. What is needed is Trustworthiness, defined as the sum of Safety, Reliability, Availability, Resilience, and Security.

Presented at: Haifa Verification Conference (HVC) 2016
By: Amir Rahat, former Optima VP of R&D

Self-Driving Cars and Their Influence on the Automotive Semiconductor Industry

An introduction to ISO-26262 and Functional-Safety for Semiconduction Chips

Presented at: ChipEx 2016, Tel Aviv
By: Jamil Mazzawi, Optima Founder and CEO

Introduction to Soft Error Mitigation Using Selective Hardening, Part 1

Presented at: ChipEx 2014, Tel Aviv
By: Jamil Mazzawi, Optima Founder and CEO

Introduction to Soft Error Mitigation Using Selective Hardening, Part 2