Overview

Technology and Solution Overview

Automotive electronic device verification is the most rigorous and extreme of any semiconductor verification process today.

Safety concerns require that these Integrated Circuits (ICs) meet stringent safety standards as specified in the ISO 26262 Automotive Safety Standard. Different devices must adhere to specific “Automotive Safety Integrity Levels” (ASIL) from A to D within the standard, with the safest device being ASIL-D. To achieve an ASIL-D rating, firstly the device requirements must be verified to an extremely high coverage or quality level, the “Systematic” flow. Then the device must also undergo an analysis to show that “Random” faults that can occur during normal operation due to environmental affects will not disrupt the device function.

While the Systematic verification phase may be accomplish using an enhanced but standard verification process coupled with extended requirements tracking, the Random phase requires specialized tooling and methodologies, and requires a considerable amount of time and knowledge to accomplish. Optima has revolutionized the Random phase of the process, leveraging leading edge simulation technology and considerable methodology experience.

Systematic & Random Verification

In order to recover effectively from a fault condition in the design, Safety Mechanisms (SMs) are used to trap and eliminate the effect of particularly harmful faults that will otherwise alter device behavior. The verification process for the device involves ensuring that the effect of any fault of any type will either be dissipated during operation or eliminated by an SM.

Random verification involves injecting faults into a design to demonstrate that normal functionality is extremely unlikely to be disrupted. There are multiple fault types that need to be considered, for example, transient faults or soft errors, stuck at faults, or hard errors, and others. Faults are classified by the danger they may pose, as well as other factors. The different sections of the design in which the faults may occur are also important, for example, memories versus logic flips flops, etc. Various verification approaches are required for these different fault types, and these approaches are generally based on fault simulation as a mechanism to analyze fault effects.

Today, Optima has produced two such solutions for critical phases in the Random verification process:

  • Optima-SE: Selective hardening solution for resolving soft-errors (transient-faults) and achieving the ISO 26262 level ASIL-B, ASIL-C or ASIL-D with minimal engineering andsilicon costs.
  • Optima-HE: Coverage measurement and boosting, designed for ISO-26262 compliance and development of STLs to verify hard-errors significantly more quickly than alternative solutions.
  • It should be noted that more solutions will be announced in the near future.

Optima Automotive Safety Platform for ISO 26262 ASIL-D Applications

These solutions are based on Optima’s Fault Injection Engine, Optima-FIE, providing a dramatic acceleration of any fault analysis.

Fault simulation involves running regular simulations on a design repeatedly, while injecting faults by either switching the state of bits or holding them to a 1 or 0 throughout the design. As such, a basic fault simulation run will require the time taken by the regular simulation multiplied by the number of potential faults in the design, often an enormous period. Of course there are many techniques to reduce this time, such as fault pruning or collapsing, but it still requires an inordinate amount of time from already compressed schedules.

Traditional fault simulation tools were created originally for manufacturing test verification and have been adapted to this new application. Optima has built a revolutionary new fault simulation analysis tool from scratch that is specifically designed for the random automotive verification process, and runs several orders of magnitude faster than traditional tools, reducing the time required for fault analysis from weeks to hours.

The Optima-FIE patented simulation technology uses a different approach to fault simulation that provides the exact same data without the associated extraordinary runtime overhead. In benchmarks, this solution has been proven to complete very large fault simulation runs orders of magnitude faster than the nearest competitor, dramatically changing the dynamics of the entire Random verification process. Months can be shaved of development schedules, often at a point where time-to-market pressures are extreme.

In addition, by wrapping solutions around fault simulation, random verification methodology headaches are also dramatically reduced saving more engineering time and effort while providing higher quality results that are more likely to result in an ASIL-D classification.

The Optima solution is in use today at leading automotive semiconductor companies and is rapidly gaining acceptance throughout the industry.